SMTA International Conference and Exhibition

Professional Development Courses

Half day (3.5 hours) educational courses are led by internationally respected professionals with extensive experience in the subject area. Course instructors deliver focused, in-depth presentations on topics of current importance to the industry, based on their research and industry experience. Professional Development Courses are application oriented and structured to combine field experience with scientific research to solve everyday problems. They are offered on Sunday and Monday to provide you the opportunity to attend the conference sessions and visit the exhibit floor.

Course registration includes breaks, course materials, and a Certificate of Attendance.

SUNDAY, September 17, 2017

Ray Prasad, Ray Prasad Consultancy Group
Sunday, September 17 | 8:30am — 12:00pm

Course Objectives
This course is based on IPC 7530 Guidelines for Temperature Profiling for Mass Soldering Processes chaired by Ray Prasad. IPC 7530 was released in February 20, 2017. The focus of this course is to focus on dos and donts of developing thermal profiles for widely used soldering processes in order to reduce soldering defects and improve quality and reliability.

During soldering it is critical that all solder joints reach the minimum soldering temperature. But what is that minimum temperature and most importantly how do you measure it? And how do make sure that those temperatures remain valid over the life of that product in production. There are many alloys in both tin-lead and lead free including low temperature soldering processes that are being used today and being soldered by various soldering methods. But it is surprising how many companies use incorrect profiles. Even those who may think they are using correct soldering profiles are using wrong profiles since they measure and monitor those profiles incorrectly. Incorrect thermal profiles can damage or warp components and boards. The problem becomes even more complex when you have a board with components of different size and thermal mass and even of different soldering alloy combinations – all on the same board to be soldered at the same time.

For example, the biggest challenge for the person responsible for developing profile is that all components even though their thermal masses are different, they all must meet the same minimum and maximum temperature requirements. So developing a thermal profile of an assembly populated with very large thermal mass components (such as a large BGA) and small thermal mass components (such as 0201 or even smaller chip resistors and capacitors) is a balancing act indeed. Additional complexity is added because different heating and cooling rates have different impact on different types of defects. For example, slower heating rate will help in reduction of voids in a BGA but it will increase the potential for head on pillow in the same BGA.

This is not a theoretical course. It is based on years of instructor’s experience at major companies like Intel and Boeing and numerous small and large companies across the globe and major IPC documents such as IPC 7530 (Thermal Profile Development), IPC 7095 (BGA), IPC 7093 (BTC), IPC 786 (now JTD 20/33, Moisture sensitive components) and IPC 782 (now IPC 7351, Land Pattern Design).

The objective of this course is to give a brief summary of all the major soldering processes and equipment and how to correctly measure and control the profiles being used.

Topics Covered
1. An Overview of various soldering process and their Profiles
      • Mass Soldering Process (wave and reflow
      • Thermal shock Prevention for Wave
      • Application Specific Soldering Processes (vapor phase, laser and Selective Soldering)
2. Soldering zones, Profiles and Profilers
3. Super heat, Peak, TAL and True TAL
4. Recommended Profiles for tin lead, lead free and mixed alloys
5. Methods and locations for attaching thermocouples for BGAs – Dos and Donts
6. Monitoring and Controlling Oven Performance
7. Examples of Good and Bad Profiles and related defects
8. Review, Questions and Answers

Jasbir Bath, Bath Consultancy LLC
Sunday, September 17 | 8:30am — 12:00pm

Course Objectives
The course will review board pad design, stencil design, soldering materials, board and component surface finishes and their interactions in detail from a design, process/reflow, microstructure and reliability perspective and discuss potential solutions together with assembly guidelines and best practices for improved manufacturing yield and reliability.

Topics Covered
There are challenges in electronics manufacturing to improve manufacturing yield and reliability with the variety of components being assembled on the board. The course will cover board pad design and stencil aperture design for a variety of components including chip components, BGA/CSP components, BTC/MLF/QFN/ LGA components and lead-frame components and look at their affect on manufacturing yield and board level reliability with reference to various IPC and related industry standards and evaluations done in industry. It will also discuss soldering materials, board and component surface finishes and their influence on process yield and reliability. The topics will be covered in terms of: Board Design, Stencil Design, Soldering Materials, Board and Component Surface Finishes, Microstructure, Reliability, Assembly Guidelines, Manufacturing Yields. The course will review these interactions in detail from a design, process/reflow, microstructure and reliability perspective and discuss potential solutions together with assembly guidelines and best practices for improved manufacturing yield and reliability.

*Ning-Cheng Lee, Ph.D., Indium Corporation
Sunday, September 17 | 8:30am — 12:00pm

Course Objectives
While the electronic industry is advancing rapidly toward miniaturization, two more important drivers actually dictate whether the manufacturers could stay in the game or not – Low Cost, and High Reliability. The former is the ticket to get into the game, while the latter is the ticket to stay in the game. These two drivers exemplified their vital role most astonishingly in solder materials. This course covers the roles of solder composition on cost, and on reliability. After reviewing the role of Ag in both cost and reliability, the solder materials are reviewed from the lowest cost, zero-Ag solders to composition with higher and higher Ag content. Among all of the alloy options present on the market, including the most recent development, the representative alloys are introduced with more details, including materials properties, soldering performance, some of the known failure modes, and the primary merit of these alloys.

Topics Covered
1. Cost
2. Ag on physical properties
3. Ag on reliability
4. What can be done on improving reliability of low Ag?
5. Low cost alternatives
6. Ag=0
      a. Sn995 (Sn0.5CuCo)
      b. SN100C (Sn0.7Cu0.05Ni0.006Ge)
      c. SnCuNiBi
7. Ag = 1
      a. SAC0307 (Sn0.3Ag0.7Cu)
      b. SAC0510Mn (Sn0.5Ag1Cu0.05Mn)
      c. SAC107+1.6Bi0.2In (M40)
8. Ag = 2
      a. S1XBIG (Sn1.1Ag0.7Cu1.8Bi0.06Ni)
      b. SAC125+0.05Ni (L35)
      c. SACi (Sn1.7Ag0.6Cu0.4Sb)
9. Ag = 3
      a. Sn2.25Ag0.5Cu6Bi (Violet)
      b. SAC2508+NiBi
10. Ag = 4
      a. Sn3.6Ag0.6Cu0.1Ni1.3Sb2.8Bi (Innolot)
      b. 88.8Sn3.8Ag0.9Cu6Sb0.5In
      c. 89Sn4Ag1.1Cu5.6Sb0.3Bi

Bihari Patel, Bihari Patel SMT Connections Inc.
Sunday, September 17 | 8:30am — 12:00pm

Course Objectives
With the Lead Free transition and green revolution changes completed at Assemblers and Fabricators to meet demands of higher densities for Printed Circuit Boards presenter will share his experiences. Global sourcing of PCBs is a reality with larger batch quantities, to prevent line stoppage and expensive rework, it is important that emphasis be placed on PCBs prior to assembly to highlight issues and prevent future issues prior to use. Ensuring quality PCBs are entering in the assembly process, resulting in higher first pass yield and reduced rework associated with PCB quality deficiency. This workshop will highlight any deficiency in PCB fabrication and ones following best practices will be exhibit their strengths against other fabricators. Will also cover key result areas in Assembly Process and Metal Core - LED PCBs their assembly challenges.

Topics Covered
  • Lead Free and Leaded assembly of circuit boards showing defects experienced related to PCB fabrication.
  • 101 of PCB Fabrication for Contract Electronic Manufacturing and Original Equipment Manufacturer
  • Process Control and applicable specifications for outgoing quality.
  • Descriptions with examples of applicable test methods, including reference to IPC documentation
  • Top twenty defects will be highlighted and with emphasis on how to detect, report and get corrective actions for prevention.
  • Fabricator selection, source Inspection and ongoing preferred fabricator audits
  • Case Studies
  • Metal Core - LED PCBs and assembly challenges
  • S. Manian Ramkumar, Ph.D., Rochester Institute of Technology
    Sunday, September 17 | 8:30am — 12:00pm

    Course Objectives
    The reflow soldering process is a key process in surface mount electronics assembly after stencil printing process. The soldering parameters influence the quality of the solder joint in a surface mount PCB assembly. This course will provide a thorough understanding of the reflow process for tin-lead and lead free soldering. Topics include an in-depth look at the various soldering methods, mechanism for solder joint formation, intermetallic formation, reflow parameters, effect of reflow parameters, thermocouple attachment and profiling, importance of profiling, defect identification and corrective action. Participants in this course are sure to acquire a sound understanding of the soldering process and its influence on assembly yield.

    Topics Covered
    1. Introduction to soldering
    2. Soldering terminology
          a. Surface Tension
          b. Wetting
          c. Capillary Action
          d. Wetting Angle
    3. Intermetallic compounds and its formation
    4. Heating methods for soldering
          a. Conduction
          b. Convection
          c. Infrared Radiation
    5. Different soldering techniques
    6. Reflow soldering specifications
    7. Phase diagrams and their analysis
    8. Reflow Process requirements
    9. Features of a reflow equipment
    10. Reflow zones and profile parameters
    11. Comparison between the Sn-Pb and Pb-free reflow process
    12. Types of reflow profile
          a. Ramp-Soak-Spike
          b. Ramp-to-spike or Straight
          c. Shoulder
          d. Flat Head
    13. Reflow profile band and its use
    14. Procedure to generate reflow profile
    15. Oven setting parameters
    16. Procedure of thermocouple attachment
    17. Issues affecting Pb-free reflow
    18. Reflow process issues
    19. Nitrogen inerting and its need
    20. Critical parameters for reflow
    21. Reflow profile elements and associated defects

    *Ning-Cheng Lee, Ph.D., Indium Corporation
    Sunday, September 17 | 1:30am — 5:00pm

    Course Objectives
    Since the dawn of electronic industry, the soldering process encompasses mainly component manufacturing and printed circuit board assembly with hierarchic melting range selection. The former use solder alloys with melting temperature around 300C, which will not melt in the subsequent PCB assembly process, where the solders typically melt around 200C. Low temperature solders with melting temperature less than 180C are currently mainly used for niche applications. However, iNEMI roadmap predicts low temperature soldering to become one of the main stream processes by 2017. The low temperature soldering is greatly desired for a number of special applications, such as many sensors used in IoT, heat sensitive devices, systems with more hierarchic levels, parts with significant difference in coefficient of thermal expansion, components exhibiting severe thermal warpage, or products with highly miniaturized design. This course will cover the varieties of low temperature solders with emphasis on lead-free alloys, their physical, mechanical, and soldering properties, and the applications involved with those alloys.

    Topics Covered
    1. Market Demand & Tentative Binary Alloys Options
    2. SnIn
    3. BiSn
    4. BiSn + Ag
    5. BiSn + Proprietary Dopants
    6. BiSn + In, Ni
    7. BiSn + Sb, Zn, Ag
    8. SnInAg & Applications
    9. Summary
    10. Appendix
    John Lau, Ph.D., ASM Pacific Technology
    Sunday, September 17 | 1:30pm — 5:00pm

    Course Objectives
    Recent advances in, e.g., fan-out wafer/panel level packaging (TSMC’s InFO-WLP and Fraunhofer IZM’s FO-PLP), 3D IC packaging (TSMC’s InFO_PoP vs. Samsung’s ePoP), 3D IC integration (Hynix/Samsung’s HBM for AMD/NVIDIA’s GPU vs. Micron’s HMC for Intel’s Knights Landing CPU), 2.5D IC Integration (Xilinx/TSMC’s CoWoS and TSV-less interconnects and interposers), embedded 3D hybrid integration (of VCSEL, driver, serializer, polymer waveguide, etc.), 3D CIS/IC integration, 3D MEMS/IC integration, and Cu-Cu hybrid bonding will be discussed in this presentation. Emphasis is placed on various FOWLP assembly methods such as chip-first with die-up, chip-first with die-down, and chip-last (RDL-first). Since RDLs (redistribution layers) play an integral part of FOWLP, various RDL fabrication methods such as Cu damascene, polymer, and PCB (printed circuit board) will be discussed. A few notes and recommendations on wafer vs. panel, dielectric materials, and molding materials will be provided. Also, TSV-less interposers such as those given by Xilinx/SPIL, Amkor, SPIL/Xilinx, ASE, MediaTek, Intel, ITRI, Shinko, Cisco/eSilicon, Samsung, and Sony will also be discussed. Furthermore, new trends in semiconductor packaging will be presented.

    Topics Covered
    1. Introduction
    2. Fan-Out Wafer/Panel-Level Packaging
  • Patents Impacting the Semiconductor Packaging
  • Fan-out Wafer/Panel-Level Packaging Formations -Chip-first (die-down) -Chip-first (die-up) -Chip-last (RDL-first)
  • RDL Fabrications -Polymer method -PCB/LDI method -Cu damascene method
  • TSMC InFO-PoP vs. Samsung ePoP
  • Wafer vs. Panel Carriers
  • Notes on Dielectric and Epoxy Mold Compound
  • Semiconductor and Packaging for IoTs (SiP)
  • Wafer/Panel-Level System-in-Package (WLSiP and PLSiP)
  • Package-Free LED (Embedded LED CSP)
  • SMT assembly of fan-out packages
    3. 3D IC Integration with TSVs
  • Memory Chip Stacking – Samsung’s DDR4
  • Hybrid Memory Cube (HMC) – Micron/Intel’s Knights Landing
  • High Bandwidth Memory (HBM) – Hynix/AMD’s and Samsung/Nvidia’s GPU
  • Chip stacking by TCNCF
  • Samsung’s Widcon
  • 3D IC/CIS Integration
  • 3D IC/MEMS Integration
  • Embedded 3D Hybrid Integration
    4. 2.5D IC Integration and TSV-Less Interposers
  • TSMC/Xilinx’s CoWoS
  • Xilinx/SPIL’s TSV-less SLIT
  • SPIL/Xilinx’s TSV-less NTI
  • Amkor’s TSV-less SLIM
  • ASE’s TSV-less FOCoS
  • MediaTek’s TSV-less RDLs by FOWLP
  • Intel’s TSV-less EMIB
  • Intel/AMD’s TSV-less EMIB for CPU, GPU, and HBM
  • ITRI’s TSV-less TSH
  • Shinko’s TSV-less i-THOP
  • Cisco/eSilicon’s TSV-less Organic Interposer
  • Samsung’s TSV-less Organic Interposer
  • Sony’s TSV-less CIS (Cu-Cu Hybrid Bonding)
    5. Semiconductor Packaging and Assembly New Trends
    6. Summary and Q&A
  • *Chrys Shea, Shea Engineering Services
    Sunday, September 17 | 1:30pm — 5:00pm

    Course Objectives
    This advanced course on SMT solder paste stencil printing builds upon the basics to give the attendees a larger toolkit for troubleshooting and process improvement. The session starts with the handling and verification of incoming stencils, and continues with detailed methods of troubleshooting suspected stencil issues, showing images and data from multiple real-world stencil trials.

    Stencil underwiping is presented, reviewing types of wipe sequences, wiper papers and solvents, particularly as they relate to modern lead-free solder pastes and the preservation of nanocoatings. Videos and ultraviolet images of the effects of cleaning and nanocoatings are shown.

    The course then moves to automated Solder Paste Inspection (SPI) and discusses basic types of SPI equipment. It continues with tips for production implementation and setting inspection tolerances. It then introduces simple experimental methods that can be performed quickly and easily to improve yields using SPI data. The differences between accuracy and repeatability are discussed, as are the effects of setting of reference planes and measurement thresholds.

    The course concludes with the latest updates from the past year's research.

    Topics Covered
    1. Stencil Verification
      • SPI verification
      • Test coupons
      • SEM images
      • Cleaning before using

    2. Stencil Troubleshooting
      • Physical damage
      • Foil thickness
      • Aperture size
      • Aperture location
      • Impact on AR & TE
      • Cut Quality

    3. Underwiping
      • Purpose and methods
      • UV Test results
      • Solvent requirements
      • Solvent compatibility with solder pastes
      • Solvent and paper compatibility with nanocoatings

    4. Automated Solder Paste Inspection (SPI)
      • SPI basics
      • Production implementation
      • Setting inspection tolerances
      • Improving print yields
      • Accuracy and Repeatability
      • Reference planes and measurement thresholds
      • Special features to improve performance
    5. Latest developments in stencil printing technologies
    Ray Prasad, Ray Prasad Consultancy Group
    Sunday, September 17 | 1:30pm — 5:00pm

    Course Objectives
    Most of the SMT courses at various conferences cater primarily to Engineers and Technicians. They are too technical for the Rainmakers, the people who bring in the business and are dealing with business issues of SMT. The objective of this course is to provide technical information to movers, shakers and the rainmakers responsible for selling and buying of SMT equipment and materials including components and PCBs.

    This workshop provides an overview of SMT manufacturing processes and role of SMT equipment and materials in non-technical manner. It begins with highlighting the problems that we all need to address, no matter what our job titles are and then delves into the role of materials and equipment to solve those problems. A good understanding of key issues in SMT without getting too technical is intended to help to help you in making sound business decisions.

    Topics Covered
    1. Benchmarking the Problem
      • Lead Pitch and Configuration and Their Impact on Quality
      • Impact of Lead Free, No clean, Fine Pitch and No Lead on Yield
      • Role of Materials and Equipment in Controlling Quality
    2. SMT Components, Processes and Equipment
      • Selection & Evaluation of SMT Equipment
      • Active and Passive SMT components
      • SMT Process Flow for Various Types of Products
      • Adhesive, Paste and Their Application
      • Soldering (Reflow including Vapor Phase, Wave & Selective)
      • Flux and Cleaning & No Clean
      • AOI, Repair and Test
    3. Strategy for Preventing Field Returns
      • Quality Index for Managers to Monitor
      • Review
    *Vern Solberg, Solberg Technical Consulting
    Sunday, September 17 | 1:30pm — 5:00pm

    Course Objectives
    The design guidelines for flexible circuits, although similar to rigid circuits, are somewhat unique. In essence, flex-circuits furnish unlimited freedom of packaging geometry while retaining the precision density, and repeatability of printed circuits. Flex-circuits typically replace the common hard-wire interface between electronic assemblies. The flexible circuits, however, have significant advantages over the hard-wired alternative because they fit only one way, eliminate wire routing errors, and save up to 75% on space and weight. Because the flex-circuit conductor patterns can maintain uniform electrical characteristics they contribute to controlling noise, crosstalk, and impedance. The flex-circuits will often be designed to replace complex wire harness assemblies and connectors to further improve product reliability.

    During the half-day tutorial program participants will have an opportunity to review and discuss the latest revision of PC-2223, Sectional Design Standard for Flexible Printed Boards that include base material sets, alternative fabrication methodologies and SMT-on-flex assembly processes. The workshop will also furnish practical flex circuit supplier DfM recommendations for ensuring quality, reliability and manufacturing efficiency.

    Topics Covered
    1. Applications and use environment
      • Commercial/Consumer
      • Industrial/Automotive
      • Medical/Aerospace
      • Establishing end use criteria
    2. Designing flexible and rigid-flex circuits
      • Flex circuit outline planning
      • Circuit routing and interconnect methodologies
      • Fold and bend requirements
      • SMT land pattern reinforcement criteria
    3. Material and SMT components
      • IPC standards for flex and rigid-flex dielectrics
      • Base material and metallization technologies
      • Selection criteria for SMT components
      • SMT land pattern development
    4. Assembly processing of flex and rigid-flex circuits
      • Dimensioning and tolerance criteria
      • Palletized layout for in-line assembly processing
      • SMT assembly process variations and methodologies
      • Alternative joining methods for flexible circuits

    MONDAY, September 18, 2017

    *George Milad, Uyemura International Corporation
    Monday, September 18 | 8:30am — 12:00pm

    Course Objectives
    Course Objectives Surface finish is about connectivity. It is the surface through which the connection from the board to a device occurs. Ball grid arrays, wire bonding pads, press fit, and contact switches are all outside the traditional realm of HASL and electrolytic nickel gold tab plating and require innovative solutions. This workshop will focus on the alternatives: electroless nickel/immersion gold, electroless gold, immersion silver, immersion tin, OSP, electroless palladium, direct gold on copper and the newcomer electroless palladium/immersion gold EPIG. Deposit description, thickness requirements, method of manufacturing, shelf life, application, limitations and relative cost will be covered in detail, from design thru assembly. A complete update on IPC Specifications will be presented.

    Topics Covered
    1. Electroless Nickel/Immersion Gold( ENIG)
    2. Electroless Gold
    3. Electroless Nickel/Electroless palladium/flash Gold (ENEPIG)
    4. Direct Immersion Gold on Copper DIG
    5. Electroless Palladium on Copper
    6. Organic Solderability Preservative OSP
    7. Immersion Silver
    8. Immersion Tin
    9. Electroless Palladium Immersion Gold EPIG
    Jennie Hwang, Ph.D., H-Technologies Group
    Monday, September 18 | 8:30am — 12:00pm

    Course Objectives
    The course emphasizes on practical, working knowledge, yet balanced and substantiated with science by outlining solder joint reliability fundamentals in fatigue and creep damage mechanisms via ductile, brittle, ductile-brittle fracture, and by discussing the critical “players” of solder joint reliability (e.g., manufacturing process, PCB/component coating surface finish, solder alloys). Likely solder joint failure modes of interfacial, near-interfacial, bulk, inter-phase, intra-phase, voids-induced and surface cracks will be illustrated. To withstand harsh environments, the strengthening metallurgy to further increase fatigue resistance and creep resistance will be addressed, and the power of metallurgy and its ability to anticipate the relative performance will be illustrated by discussing the comparative performance vs. metallurgical phases and microstructure. The question on whether a life-prediction model can assure reliability will be discussed. A relative reliability ranking among commercially available solder systems, as well as the scientific, engineering and manufacturing reasons behind the ranking will be outlined. Attendees are encouraged to bring their own selected systems for deliberation.

    Topics Covered
    1. Solder joint fundamentals & thermo-mechanical behavior and degradation – fatigue and creep interaction
    2. Solder joint failures modes - interfacial, near-interfacial, bulk, inter-phase, intra-phase, voids-induced, surface-crack, and others
    3. Solder joint failure mechanisms – ductile, brittle, ductile-brittle transition fracture
    4. Solder joint strengthening metallurgy
    5. Illustration of microstructure evolution vs. strengthening in Sn Cu+x,y,z and SnAgCu+x,y,z systems
    6. Solder joint voids vs. reliability - causes, effects, criteria
    7. Solder joint surface-crack –causes, effects
    8. Distinctions and commonalties between Pb-free and SnPb solder joints
    9. Thermal cycling conditions - effects on test results and test results interpretation
    10. Testing solder joint reliability – discriminating tests and discerning parameters
    11. Life-prediction model vs. reliability
    12. Solder joint performance in harsh environments
    13. What solder alloys are on the horizon and what impact will be on reliability
    14. Best practices and competitive manufacturing
    15. Ultimate reliability
    Ray Prasad, Ray Prasad Consultancy Group
    Monday, September 18 | 8:30am — 12:00pm

    Course Objectives
    Ball Grid Array (BGA) is one of many surface mount components but it brings unique challenges in both design and assembly of the mixed assembly products. There is great interest in BGA because it offers so many benefits such as real estate savings, high yield and better electrical performance. Despite these promises, there are many problems in BGA and CSP (Chip Scale Packaging). The need to implement lead free simply compounds the problem due to intentional or unintentional mix of tin lead and lead free components on a mixed assembly board.

    This course is based on the latest revision (Jan 2013) of IPC-7095C “Design and Assembly Process Implementation for BGA, Rev C” currently chaired by Ray and his book Surface Mount Technology Principles and Practice.

    This is not a theoretical course. It is based on Ray’s years of experience in successfully implementing SMT at Boeing and Intel, and various clients including legal cases related backward compatibility. You will get insight into what to do about backward and forward compatibility issues when you have no choice but to deal with tin-lead and lead free BGA on the same board and want to produce products that improve yield, reduce cost and keep away from legal troubles.

    In this course we will also talk about major defects such as pad cratering, head in pillow, as ball drop, smiling and frowning BGA and black pad and champing voids. And you will learn everything you wanted to know about voids but were afraid to ask. We will talk about various types of voids in BGA, their impact and their minimization and acceptance criteria to meet industry standard.

    You will also get an insight into the interdependency of design and manufacturing to achieve higher yield, lower cost and faster time to market.

    Topics Covered
    1. BGA Component Styles: Tin-lead, No Lead and High Lead
    2. Industry Standard for BGA Design and Assembly (IPC-7095)
    3. Driving Forces for BGA
    4. Major Concerns with BGA: Moisture and Warpage
    5. BGA Design Rules and Guidelines – Impact of ball size, pitch and I/O count
    6. BGA Assembly Processes: Issues and Answers
       a. Printing and Reflow Profiling Guidelines
    7. Backward & Forward Compatibility Issues and role of selective laser reflow
    8. Impact of Lead Free on BGA Reliability
    9. Various Types of Voids in BGA, their impact, measurement and control
    10. Major Types of BGA Defects
       a. Pad cratering, head in pillow, as ball drop, smiling and frowning BGA and black pad and champing voids
    11. BGA Repair
    12. Summary
    Phil Zarrow and Jim Hall, ITM Consulting
    Monday, September 18 | 8:30am — 12:00pm

    Course Objectives
    We don't assemble electronics in “perfect world”. Defects happen! This course examines Failure and Root Cause analysis of PCBA defects, starting with clear definition of the generic types of defects and their impact, such as non-function, reduced reliability, etc. Detection and determination methodologies and procedures will be discussed. Cause and effect of defects relative to specific processes and equipment centers as well as materials are presented. Key causes of assembly problems and low yields are identified and resolved. This seminar is intended for anyone involved in directing, developing, managing and/or executing Failure and Root Cause analysis and defect resolution including managers, engineers and others in manufacturing, quality and design.

    Topics Covered
  • Introduction
      • Prevention: Process Development and Validation
      • Variation (Common Cause)
      • Continuous Improvement

  • Defect Definition
      • Failure
      • Reduced Reliability
      • Process Indicator
      • Special Cause vs. Common Cause
      • Defect Identification
        • Inspection (Manual, AOI, X-Ray)
        • Test (ICT, Functional, Contamination)
      • False Calls / Escapes

  • Causes of Defects
      • Special Cause vs. Common Cause
      • Variability (repeatability)
      • Accuracy
      • Process not Optimized

  • Root Cause Analysis
      • “5 Whys”
      • Cause and Effect Diagram

  • Process Relationships
      • Incoming Materials
      • Handling
      • Process Problems
        • Wrong Process
        • Degraded Process
        • Poor Process (common cause defects)
  • *Dock Brown, DfR Solutions
    Monday, September 18 | 8:30am — 12:00pm

    Course Objectives
    The objective of the professional development course is to provide the attendees actionable information on the industry best practices on how to predict and ensure the reliability of electronic product lifecycle and within project budget and schedule constraints. Product failures are driven by electrical, mechanical, thermal, chemical, and humidity stresses. Industry standards cover most of those and form the basis for developing design requirements.

    Those requirements can then be used during design and development to take conceptual designs and applying design rules with simulation and modeling tools, board performance and likely sources of failures can be quickly determined. Special emphasis is given to recent hot failure topics such as lithium batteries, MLCCs, and board cleanliness.

    Topics Covered
  • General Concepts and Models
  • Fitness for Use
  • Five Pillars of DfX
  • Requirements and Parameter Management
  • Use Conditions
  • Structured Design
  • Process Control
  • Process Capability
  • Four DfX Qualities
  • Design Control Waterfall
  • Risk Management
        Risk Model
        Risk Assessment
        Risk Mitigation
        ISO 13485 IQ/OQ/PQ
  • PPAP
  • Conceptual Product Space Model
  • Product Life Expectations
  • Materials and Processes
  • Systems
  • Technology Flow Model
  • Rules vs Tools
  • Material Degradation
  • The Bathtub Curve
  • Conformance Failures
  • Random Failures
  • Wear-out Failures
  • Industry Standards
  • Design for Sourcing
  • Commercial of the Shelf (COTS)
  • Custom
  • Supply Chain Ecosystem
  • Outsourcing
  • Case Studies
  • Risk Prone Materials and Processes
        Lithium Ion Batteries
  • MLCCs
        Flame Retardants
  • Happy Holden, GENTEX
    Monday, September 18 | 1:30pm — 5:00pm

    Course Objectives
    This is a half-day course of skills that you don't acquire in college! There are many essential skills required for a successful career in the electronics industry. The majority of them are technical, but there are also ‘soft’ skills required. Most of these are not taught in college, but have to be learned ‘on-the-job’ or the opportunities for advanced are seriously impaired. Presented here will be an important ten of the 25 essential skills required in electronics manufacturing. All 25 will be documented in the accompanied free e-Book, along with directions for further study, at your own pace.

    Topics Covered
  • Total Quality Control (TQC)
  • Design of Experiments
  • Problem solving skills
  • Developing a Figure of Merit
  • Design for Manufacturing and Assembly
  • Computer Integrated Mfg. And Automation Planning
  • Computer Aided Manufacturing
  • Dimensional Analysis
  • Quality Function Deployment (QFD)
  • Ten Step Business Plan
  • *Mike Bixenman, DBA, KYZEN Corporation
    Monday, September 18 | 1:30pm — 5:00pm

    Course Objectives
    As electronic devices build in more features using smaller form factors, there will be limitations, obstacles and challenges to overcome. Advances in component technology can create other issues that may have time delayed effects. One such effect is device failure due to soldering residues trapped under bottom terminated components. If the residues trapped under the component termination are active and can be mobilized with monolayers of moisture, there is the potential for ion mobilization causing current leakage.

    How clean is clean enough is a question that OEMs struggle with when designing electronic hardware. Today, more than 50% of components placed onto the board assembly are bottom terminated. The number of connections, component pitch, standoff gap, flux composition and volume of solder reflowed under the bottom termination can impact reliability.

    This workshop will look into contaminants derived from the chemical complexity of the PCB including flux residues. We will explore conditions that could be problematic to a no-clean process. Cleaning improves reliability but the complexity surrounding cleaning is far reaching with the use of fine pitch leadless components, the need for longer wash times, high impingement pressure and material compatibility effects. We will explore these complexities and teach best cleaning practices. Once cleaning has been implemented, controlling the process assures repeatability lot to lot. We will explore methods for controlling the cleaning process including monitoring, traceability and data analytics.

    Jennie Hwang, Ph.D., H-Technologies Group
    Monday, September 18 | 1:30pm — 5:00pm

    Course Objectives
    Intermetallic compounds play an increasingly critical role to the performance and reliability of solder interconnections in the chip level, package level and board level of lead-free electronics. This course covers the relevant and important aspects of intermetallic compounds ranging from scientific fundamentals to practical application scenarios. Intermetallic compounds before solder joint formation, during solder joint formation and after solder joint formation in storage and service will be examined. The course also discusses intermetallics at-interface and in-bulk, as well as the role of PCB surface finish/component coating in relation to intermetallics, in turn, to reliability. The difference between SnPb and Pb-free solder joint in terms of intermetallic compounds, which affects production-floor phenomena and the actual field failure, will be outlined. The course will also address the newer lead-free alloys that were recently introduced to the market. Attendees are welcome to bring their own selected systems for deliberation.

    Topics Covered
    1. Intermetallic compounds – definition, fundamentals, characteristics;
    2. Phase diagrams of Pb-free solders in contrast with SnPb;
    3. Intermetallic compounds in the intrinsic material- Pb-free vs. SnPb;
    4. Formation and growth during production process and in product service life;
    5. Intermetallic compounds - at-interface vs. in-bulk;
    6. Effects from substrate compositions (hybrid module thick film pads, PCB surface finish, component surface coating);
    7. Gold embrittlement
    8. Different types of intermetallic compounds – effects on solder joint reliability (Ni/Au, Ni/Pd/Au, Ni/Pd, Cu);
    9. SAC alloys incorporated with various doping elements – characteristics, performance;
    10. Effects on failure mode;
    11. Effects on reliability.
    Phil Zarrow and Jim Hall, ITM Consulting
    Monday, September 18 | 1:30pm — 5:00pm

    Course Objectives
    We don't assemble electronics in “perfect world”. Defects happen! This course examines Failure and Root Cause analysis of PCBA defects, starting with clear definition of the generic types of defects and their impact, such as non-function, reduced reliability, etc. Detection and determination methodologies and procedures will be discussed. Cause and effect of defects relative to specific processes and equipment centers as well as materials are presented. Key causes of assembly problems and low yields are identified and resolved. This seminar is intended for anyone involved in directing, developing, managing and/or executing Failure and Root Cause analysis and defect resolution including managers, engineers and others in manufacturing, quality and design.

    Topics Covered
  • Specific Processes
      • General: wrong process, material, etc.
      • Printing
      • Placement
      • Soldering
      • Singulation
      • Coating
      • Mechanical Assembly
      • Testing

  • Specific Defect Examples and Causes
      • Wrong Part
      • Damaged Parts
      • Shorts
      • Opens
      • Poor Wetting
      • Insufficient
      • Contamination
      • New Specific Defects
        • HiP/NWO
      • Pad Cratering
      • CAF

  • Conclusion
  • Questions
  • Dale Lee, Plexus Corp.
    Monday, September 18 | 1:30pm — 5:00pm

    Course Objectives
    As electronic component packaging technologies continue to decrease in size (0201/01005/008003), lead pitch continues to decrease (0.4/0.35/0.3/…), bottom terminated components increase in complexity (QFN/DFN/LGA) and printed circuit board designs increase in diversity of component packaging technologies on a single assembly, layer counts increase, via in pad utilization increases, increasing copper thicknesses, increasing thermal sensitivity of components and assembly process, and industry standards trailing in application to current technology demands has impacted traditional assembly processes. Today’s assemblies require tight solder application, component placement, thermal management and soldering constraints. Using traditional, simplified mass production techniques are not be sufficient to achieve a high-yielding manufacturing process.

    This course will highlight elements of the impacts of these technologies on reliability and yield when not properly addressed in the design/assembly/inspection-test process and their impacts on thermal connections of through-hole and surface soldering processes, introduce the elements of matching the manufacturing process to the product design(DFMP), and provide examples of several opportunities within the DFMP for yield improvement through manufacturing tooling design, SMT and PTH assembly process matching. The concept of manufacturing, test, reliability by design (XBD) will be presented.

    Topics Covered

    • Component packaging impacts
    • PCB design impacts and industry standards limitations
    • SMT and PTH solder design impacts
    • Components with thermal management impacts:
       - Component design
       - PCB Thermal balance: X, Y and Z axis
       - Trace routing
       - Equipment limitation/tolerance
       - PCB array tolerance
       - Process tooling design
    • Process control impacts
    • Paste volume, thermal shock SMT and PTH, reflow process warpage
    • Cleaning impacts
    • Compatibility issues, low stand-off components

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