100 S Central Expy #63, Richardson, TX 75080,
Adam Ley, Chief Technologist - ASSET InterTech, Inc.
Even since the early days of “JTAG”, it was about more than just boundary scan test. And today’s 1149.1 is not your father’s “JTAG” … Our presentation will open with the basics of JTAG 1149.1 boundary scan, for those who need an introduction, and then go deeper to examine issues of integration, utilization and value in the sphere of assembly test. Finally, we’ll explore what’s beyond mere boundary scan as well as what’s new and next for JTAG.
Date: February 9, 2018 @ 11am
Location: Aboca’s Italian Grill, 100 S Central Expy #63, Richardson, TX 75080
Pricing (Includes Lunch):
- FREE for New Members since prior meeting
- $10 for Committee Members
- $20 Members, employees of Corporate member companies, 1st time guests, and students
- $25 non-members, students, & guests – same price
- Cash at the door or credit card on-line (see below)
- 11:00am - Check in and Networking
- 11:30am - Lunch Begins
- 11:45am - Chapter Announcements
- 12:00am - Feature Presentation
- 1:00pm - Adjourn
Adam ensures that ASSET’s non-intrusive board test (NBT) methodologies comprise a best-in-class solution to meet the evolving need for improved coverage of board test in the face of ongoing erosion of physical access. Pursuant to ASSET’s strong support for standards, Adam is an active participant in IEEE 1149.1, having previously served terms as working group vice chair and as standard technical editor (for the 2001 revision), as well as in nearly all related standards, to include: 1149.4, 1149.5, 1149.6, 1149.7, 1149.8.1, 1149.10, 1500, 1532, 1581, iNEMI boundary-scan adoption, PICMG MicroTCA, and SJTAG (system JTAG). Adam’s experience prior to ASSET spanned over a decade at Texas Instruments, Sherman TX, where he had roles in application support for TI’s boundary-scan logic products and for test and characterization of new logic families. Adam earned the BSEE degree from Oklahoma State University, Stillwater OK, in 1986.