RELIABILITY ASSESSMENT OF FLIP CHIP ON LAMINATE CSPAuthors: Julia Y. Zhao, Ph.D.
Company: Analog Devices, Inc.
Date Published: 6/11/2002 Conference: Advanced Technology Symposium
In fact, alternative materials and process technologies for flip chip remain open areas of investigation to meet newer product challenges, which in turn motivates studies on new failure mechanisms and design optimization. There is also a need for industry standards for testing and characterizing packages with flip chip technology. This paper presents a case study of reliability assessment of a low cost flip chip on laminate CSP for embedded DSP application. A daisychained test die was packaged in both molded and exposeddie forms. Parametric studies included die thickness and passivation materials. Failure mechanisms, design and assembly factors are discussed.
Keywords: flip chip, laminate, CSP, reliability, failure analysis, failure mechanism, warpage measurement, die thinning, underfill, polyimide.
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