Pan Pacific Symposium Conference Proceedings


Author: Vincent Tu
Date Published: 2/13/2001   Conference: Pan Pacific Symposium

Abstract: In the IC assembly process, wire sweep during molding is one of the vital problems related to the package quality. Generally speaking, wire sweep is caused by the drag force of the compound melt flow. There are a number of CAE analysis softwares in the market claim the capability in predicting wire sweep precisely. However, the review reveals that accuracy, effciciency, flexibility and modeling technique for high pin count (208 lead, 388 lead or more) are still problems.

This paper reports a more practical wire sweep analysis solution developed by ChipMOS. This new methodology is not only accurate in solving and efficent in modeling, but also friendly in use and has a flexble interface in simplifying the actual application. This new in-house wire sweep analysis software is named “InPack”. It is capable of connecting the global flow analysis (C-MOLD) and structure analysis (ANSYS, ABAQUS) to provide the total solution for wire sweep assessment. The wire geometry is easy to be modeled and the software could generate the detail loop shape automatically. In addition, the multi-layer data requisition criteria is captured to simulate the actual flow conditions around a wire inside the mold cavity. The friendly user interface, “Input-Execute-and-See”, could reduce the procedure of wire sweep analysis dramatically. Two examples are executed to verify the accuracy of wire sweep prediction. The first is the PBGA 90L (quadri- dice MCM package). This package has long loop wire and with high pin count. The other one is the Stacked CSP with two dice and two layers loop height plus the special reverse bond shape. The predicted results from the InPack analysis show a good agreement with the actual measurement in both the trend and accuracy.

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