Pan Pacific Symposium Conference Proceedings


Authors: T. Wakabayashi, O. Kuwabara
Company: IEP Technologies, Inc.
Date Published: 2/13/2001   Conference: Pan Pacific Symposium

Abstract: The general interconnection technologies between the chips and the substrates currently being very popular for semiconductors are COB, BGA, Flip chip, etc., using wirebonding and also flip chip bump bondings through the help of interposers made of laminate, ceramics and also tapes. This conventional technology has been prevailing for the past several years. On the other hand, this new wafer level CSP package approach using novel liquid bismaleimide polymers can exhibit many technical advantages over the past packaging technologies. It will not require the use of interposers, as it will be directly mounted onto the mother board, and also will help to meet the continued demand for package miniaturization.

Key words: COB-Chip on Board, BGA-Ball Grid Array, Flip chip, bumps, CSP -Chip Size Package

Members download articles for free:

Not a member yet?

What else do you get when you join SMTA? Read about all of the benefits that go along with membership.

Notice: Sharing of articles is restricted to just your immediate work group. Downloaded papers should not be stored on an external network or shared on the internet.


SMTA Headquarters
6600 City West Parkway, Suite 300
Eden Prairie, MN 55344 USA

Phone +1 952.920.7682
Fax +1 952.926.1819