Pan Pacific Symposium Conference Proceedings


Authors: A. Gandelli
Company: Politecnico di Milano
Date Published: 2/13/2001   Conference: Pan Pacific Symposium

Abstract: 3D microelectronics design and packaging is gaining importance and becoming fundamental in specific applications for many ICT related products [3]. Not so much emphasis, however, is put on the optimisation of design characteristics with respect to electromagnetic interference and compatibility [1]. [2]. The existing technology and design tools do not take deeply into account these class of problems. Especially new generations of 3D microelectronics devices require dedicated strategies to optimise the internal component placement and packaging process in order to reach a compromise between performance and costs. In the past this problem has been addressed with more qualitative solutions as those proposing modular structures [4], [5]. In this way suitable techniques able to give better results than those adopting one-block structures were introduced. Now a more theoretical approach leads to define a new set of rules able to overcome the problem with a good internal design and a dedicated package [6]. Specific considerations are made and comments on future developments complete the presentation on EMC demands.

Keywords: 3D Microelectronics, Packaging, EMC, EMI, Multichip Modules.

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