INTERCONNECTIONS IN 3 DIMENSIONS FOR HIGH SPEED COMPONENTSAuthors: Christian VAL, CEO
Company: 3D PLUS
Date Published: 11/1/2000 Conference: Emerging Technologies
As can be seen on Fig 1 (Review of 3D Techniques world-wide), several ways have been used to stack components. Originally, we still have the wafer; differentiation comes after. Some manufacturers, such as Irvine Sensors and Cubic Memory/VCI reroute the wafers. Like us, some other companies such as Sharp Design use specific wafers to stack memories by staggered wire bonding. In order to do so, large volumes are necessary and this technique is currently used in Telecom applications.
With regard to bare dice, i.e. after sawing, some differentiation remains depending on the chip being stacked as it is, or being plastic packaged. Some distinctions can be made between companies which stack identical bare dice; for instance NEC and 3D PLUS, and companies which stack heterogeneous chips, such as Irvine Sensors and 3D PLUS.
As far as packaged dice are concerned we can mention 2 families: companies which stack standard packages (TSOP) such as Dense-pak, IBM, Hitachi and 3D PLUS and companies which stack custom plastic packages, such as Stak-Tek and Samsung. This analysis shows that stacking of standard components (bare dice or plastic packages) results in a very low cost.
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