EXPERIMENT-BASED COMPUTATIONAL INVESTIGATION OF THERMOMECHANICAL STRESSES IN FLIP CHIP BGA USING THE ATC4.2 TEST VEHICLE
Author: David W. Peterson Company: Sandia National Laboratories Date Published: 9/12/1999
Abstract: Stress measurement test chips were flip chip assembled to organic BGA substrates containing micro-vias and epoxy build-up interconnect layers. Mechanical degradation observed during temperature cycling was correlated to a damage theory developed based on 3D finite element method analysis. Degradation included die cracking, edge delamination and radial fillet cracking.
KEY WORDS flip chip, piezoresistor stress measurement, die stresses