Low Temperature Solder Paste Transfer Efficiency Characterization and Area Ratio Limits
Authors: Abhishek Prasad, Xiying Chen, Nilesh U Badwe and Kevin J Byrd Company: Intel Corporation Date Published: 9/22/2019
Abstract: Manufacturers are looking for solutions to achieve high first pass surface mount technology (SMT) process yield for products using ultra-fine pitch ball grid arrays (BGAs) packages and ultra-thin printed circuit boards (PCBs). Low temperature solder (LTS) paste for SMT assembly has been proposed as one of the leading solutions providing multiple benefits. This paper evaluates the impact of fundamental material properties of LTS pastes on stencil print performance. Sn-Bi based LTS pastes from multiple vendors with varying concentration of Bi were characterized for print performance as a function of area ratio and compared to SAC solder paste.
Low Temperature Solder Paste, Transfer efficiency, Area Ratio, Printability, Thixotropic Index