SMTA International Conference Proceedings


High Density RDL Technologies for Panel Level Packaging of Embedded Dies

Authors: Lars Boettcher, S. Kosmider, F. Schein, R. Kahle and A. Ostmann
Company: Fraunhofer Institute for Reliability and Microintegration (IZM), Technical University of Berlin
Date Published: 9/22/2019   Conference: SMTA International


Abstract: The ongoing miniaturization and functional heterogeneity in electronics packaging are pushing the demand for advanced substrate technologies. Highly integrated, advanced multi-chip packaging solutions combine application, logic and computing dies with memory or components for power management in a single package. A solution to achieve low fabrication costs is the close embedding of thin dies in IC Substrates based on large formats (600 x 600 mm²), known from PCB fabrication. In a consortium of partners from industry and research advanced technologies for Panel Level Packaging (PLP) are developed.

This paper will show the development of 5µm L/S RDL routing density and chips with 50µm bump pitch. Here, the 6x6 mm² dies are symmetrically embedded into an organic laminate matrix. A PCB core (100µm thickness) with very low coefficient of thermal expansion (CTE) containing laser cut cavities is used, acting as a frame layer. Besides mechanical and handling stability, the usage of such a frame offers the advantage of pre-integrating additional features like local fiducials, through vias or power lines by conventional PCB processes. Within that frame, the dies are embedded by lamination of an organic build-up film with 25µm thickness equal to bump height. The chip contacts are then opened without the need of any micro via formation. Here a strong focus is set on RIE etching of the polymer material.

Highly accurate measurement of the real die position is essential for the following processing. The formation of the redistribution layer (RDL) is done in a semi-additive process (SAP) utilizing sputtering technique and direct imaging (LDI). To achieve the fine pitch demands, an adaptive imaging process is applied. Therefore, a newly developed LDI machine is used to write structures in a 7µm photoresist. This exposure also combines the measurement data of the real die position and the adaption of the exposure artwork, in order to achieve highest registration quality.

Key Words: 

panel level packaging, adaptive imaging, direct imaging, 3D system in package, IC substrate



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