Advancement of Solder Paste Inspection (SPI) Tools to Support Industry 4.0 & Package Scaling
Authors: Abhishek Prasad, Larry Pymento, Srinivasa R Aravamudhan and Chandru Periasamy Company: Intel Corporation Date Published: 10/14/2018
Abstract: During the past decade, consumer electronics and personal digital devices in particular have shrunk in size but have added significant computing power and capabilities. To enable this digital revolution, the SMT industry has driven towards thinner BGA packages with finer ball pitch and smaller solder ball sizes. Thinner and finer pitch packages are increasingly prone to warpage with less SMT process yield margin which require intricate stencil design with varying solder paste volume deposits. Increased functionality has driven footprints to be asymmetrical with SMD (solder masked defined) pads which are typically smaller with circular and oval layouts. This has fueled a need for highly accurate and smaller solder paste deposits for increased SMT yield margin and solder joint reliability. Additionally, with the introduction of Industry 4.0 and Smart Factory solutions, it is imperative that data collection must be accurate to influence the appropriate forward and backward feedback information for monitoring, tuning, and automatic adjustments. There is concern that the current industry wide inline solder paste inspection (SPI) tools are operating as gross inspection tools instead of capable metrologies. This paper evaluates the current state of inline SPI tools from multiple vendors for solder paste measurement accuracy and capability. A measurement capability analysis (MCA) was carried out against a golden metrology tool across a range of volume deposits. Results from the study will highlight the accuracy bias deviations & repeatability of current SPI tools against low volumes deposits and showcase the current gap in the SMT industry.