Development of Low Temperature Direct Bond Interconnect Technology for Die-To-Wafer and Die-To-Die Applications—Stacking, Yield Improvement, Reliability AssessmentAuthors: Guilian Gao, Laura Mirkarimi, Thomas Workman, Gabe Guevara, Jeremy Theil, Cyprian Uzoh, Gill Fountain, Bongsub Lee, Pawel Mrozek, Michael Huynh, Rajesh Katkar
Company: Xperi Corporation, CA, USA
Date Published: 10/23/2018 Conference: IWLPC (Wafer-Level Packaging)
Die-to-wafer (D2W) and die-to-die (D2D) assembly has been in development at Xperi. The unique challenges include producing shallow, uniform and well controlled Cu recess on Cu bond pads of 5 um or greater, which is substantially larger than what is normally used in W2W bonding and particle minimization on die surface prior to bonding. Xperi-designed daisy chain dies and wafers consist of chains ranging from 2 to 31356 interconnects. Die size is 7.96 mm by 11.96 mm, which is similar to a typical high bandwidth memory (HBM) die. The bonding studies include 10µm and 15µm diameter bond pads on 40µm pitch and 5µm diameter bond pads on 10µm pitch. The die thickness is either 50 µm or 200 µm.
In this paper, we present the latest development of our chemical mechanical polish (CMP) technology to produce uniform shallow Cu recess on 15um circular bond pads. The large pad size allows for a relaxed alignment accuracy requirement similar to manufacturing high throughput flip chip bonders available today. Additionally, high volume production ready process for bonding and D2W multi-layer stacking are explored as well as bonding yield and reliability improvement results.
Cu-to-Cu bonding, hybrid bonding, DBI®, D2W, D2D, die stacking, 3D, 2.5D
Members download articles for free:
Not a member yet?
What else do you get when you join SMTA? Read about all of the benefits that go along with membership.
Notice: Sharing of articles is restricted to just your immediate work group. Downloaded papers should not be stored on an external network or shared on the internet.