High Density and High Bandwidth Chip-To-Chip Connections with 20µm Pitch Flip-Chip on Fan-Out Wafer Level PackageAuthors: A. Podpod, D. Velenis, A. Phommahaxay, P. Bex, F. Fodor, EJ. Marinissen, K. Rebibis, A. Miller, G. Beyer and E. Beyne
Company: Interuniversity Microelectronics Center (IMEC)
Date Published: 10/23/2018 Conference: IWLPC (Wafer-Level Packaging)
Imec has been working on a novel 300mm FO-WLP concept that enables 20µm pitch interconnect density: Flip-Chip on FO-WLP. Major challenges and solutions are reported in this paper. Results demonstrate die placement alignment of <3µm, which is suitable to allow stacking for high density interconnect. Connections between the assembled dies were intact before and after molding.
Fan-Out, Wafer Level Package, Heterogenous Integration, Flip Chip, warpage, die shift, wafer molding, ultra-high density
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