Pan Pacific Symposium Conference Proceedings


Packaging Meets Heterogeneous Integration Driving Direction for Advanced System in Packages

Authors: M. Juergen Wolf, Wolfram Steller and Klaus-Dieter Lang
Company: Fraunhofer IZM and Fraunhofer IZM-ASSID
Date Published: 2/5/2018   Conference: Pan Pacific Symposium


Abstract: Heterogeneous integration of different devices by using 3D architectures allows the realization of application specific System in Packages (SiP) with a high functionality in a cost effective way. Enabling building blocks technologies are substrate-, interconnect-, assembly- and device integration technologies to integrate sensors, ASICs, transceiver, memories and passive elements. SiPs based on interposer architectures are very attractive due to system performance improvements and due to optimized form factor achievements on wafer level.

Key Words: 

Heterogeneous Integration, 3D integration, 3D SiP, TSV, 2.5D interposer



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