Reliability Testing of Multiple Level Microvia Structures Following Exposure to Lead-Free Assembly
Authors: Bill Birch, Ivan Straznicky, Joe Smetana Company: PWB Interconnect Solutions Inc., Curtiss Wright, Nokia Date Published: 9/17/2017
Abstract: The High-Density Packaging User Group (HDP User Group) Consortium coordinated a project titled “Multiple Laminations in Lead-free” (Multi-lam) focused on High Density Interconnects (HDI) designs which contained 2, 3 and 4-Stacked microvias that were either placed on top of buried vias, or were offset to the buried vias. A key requirement for many OEMs using these HDI structures is understanding the short-term performance through lead free assembly and ultimately long-term reliability . This project tested several constructions with different material types using Interconnect Stress Testing (IST) as the test method for obtaining and comparing reliability data on the various test cases. IST test vehicles were designed to enable resistance monitoring of various circuit configurations during current induced thermal cycling.
IST, microvias, stacked, offset, lead-free assembly, PWB reliability.