IWLPC (Wafer-Level Packaging) Conference Proceedings

Application of 3D X-Ray Microscopy For 3D IC Process Development

Authors: Teng Wang, Ingrid De Wolf, Allen Gu, Raleigh Estrada, Steve Kelly
Company: IMEC Belgium and Carl Zeiss X-ray Microscopy
Date Published: 10/18/2016   Conference: IWLPC (Wafer-Level Packaging)

Abstract: 3D X-ray microscopy (XRM) is used to image both 2-layer and multi-layer 3D stacked chips, assembled by both chip-to-chip and chip-to-wafer formats. XRM is able to generate 3D volumetric views and 2D virtual cross-sectional images of interconnects, such as through-silicon vias (TSVs) and micro bump joints in multi-layer 3D stacks. A voxel size down to 0.3 µm is obtained, sufficient to reveal details and defects in highly complicated 3D ICs. XRM offers an effective and versatile non-destructive method for process accuracy metrology, process quality inspection, and failure analysis. In addition, XRM has shown the capability to image chip stacks at different locations on a 300 mm wafer without substantial loss of resolution.

Key Words: 

X-Ray Microscopy, 3D IC, Stacking, Metrology, Inspection, Failure Analysis

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