Multi Beam Full Cut of Molded Wafer Level Chip-Scale Package
Authors: Richard Boulanger, Jeroen van Borkulo, Eric M.M. Tan. Company: ASMPT Laser Separation International B.V. Date Published: 10/18/2016
IWLPC (Wafer-Level Packaging)
Abstract: The introduction of Chip Scale Package (CSP) has become one of the key packaging solutions in the recent semiconductor industry. With the advantages of reducing the package size and stacking capability for higher interconnects, CSP’s are continuously evolving into many different types of CSP’s packages. One of the key innovative package solutions is the molded wafer level CSP (mWLCSP)1,2 due to the robust 5 sides or 6 sides protection of the devices with epoxy mold compound (EMC). The advantages of this application include, prevention of chipping and handling damage, sort screening capability due to its form factor at the wafer level, and the enhancement in board level reliability.3 The current singulation method that is the mechanical blade dicing process is encountering many challenges including yield loss, blade lifetime, productivity and its’ limitation to achieve a narrow kerf width. We report in this article the unique multi beam technology that addresses all the issues of blade dicing and, more importantly, enables a narrow dicing width while maintaining very good yield, reliability, and high productivity.