Fabrication and Reliability of a Thermally Enhanced Wafer Level Fan Out DemonstratorAuthors: André Cardoso, Hugo Barros, Gusztáv Hantos
Company: NANIUM S.A. and BME, Dept. of Electron Devices
Date Published: 10/18/2016 Conference: IWLPC (Wafer-Level Packaging)
The main challenge for power dissipation on WLSiP packaging is that the EMC must be electrical insulator, placing challenges on both heat conduction and bonding to metallic heat spreader. Whereas mold compounds are typically organic resins filled with inorganic fillers, high performance thermal interface material (TIM) are designed for metal-metal interfaces, not for organic-metal interface as required for chip backside overmolded WLFO package. Another challenge is the assembly of an integrated heatsink, over and larger than the package, on a volume manufacturing capable process, to yield both good thermal conduction and reliable thermomechanical bonding.
The work done is part of the collaborative European FP7-ICT project NANOTHERM (Innovative Nano and Micro Technologies for Advanced Thermo- and Mechanical Interfaces), performed on a consortium of leading IDM, OEM, OSAT, material suppliers and academic/ institutes.
Fan Out, FOWLP, SiP, Power applications
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