Improved SMT and BLR of 0.35mm Pitch Wafer Level Packages
Authors: Brian Roggeman and Beth Keser Company: Qualcomm Technologies, Inc. Date Published: 9/27/2015
Abstract: The surface mount process to successfully mount 0.35mm pitch Wafer level packages (WLP) was studied. Processes including solder paste printing and flux dipping were examined and optimized. The paste print process was optimized in terms of printer setup to use standard materials. Flux dipping was used as an alternative to paste printing to address situations where print challenges cannot be overcome. Flux dipping often results in a decrease in board level due to the decrease in solder joint standoff, so a novel dip encapsulant was also included. The dip encapsulant is a polymer adhesive which encapsulates the BGA joints after reflow, providing some gain in reliability over standard flux dipping. For board level reliability, temperature cycling was performed using -40 to 125 C temperature swings. The lifetime and failure modes of the package were analyzed. This study shows optimized print process can be achieved using standard materials, yet alternative SMT processes can also be adopted to successfully assemble fine pitch WLP packages, while also considering board level reliability.