An Evaluation to QFN Thermal Pad Void and Improvement
Authors: Wayne Zhang, PK Pu, Ranndy Shi and Wilson Zhen Company: IBM Corporation Date Published: 4/17/2013
Abstract: Quad flat packages with no leads (QFN) are widely used in the consumer and server industry because of their small size and weight, low cost, and excellent thermal and electrical properties. The die inside the QFN package is attached to the Cu pad which is exposed on the bottom of the package and will be subsequently soldered to the pad in PCBA assembly. Since the main function of this pad is heat dissipation, solder coverage in this pad is critical in the case of high power devices. Any solder voids in the thermal pad can cause an insufficient pad coverage and in-turn lead to overheating of the component and certain electrical failures later on with reliability concerns. Excessive voids can also cause co-planarity issues and open QFN joints. IPC-7093 recommends less than 50% cumulative voided area of the soldered thermal pad. This paper will summarize the challenges of QFN void which occurred in two recent server PCBA qualification builds, the root cause will be discussed including via configuration, solder mask design, reflow profile, stencil aperture etc, and the improvement actions from reflow profiling and stencil aperture design will be validated with the result from X-ray inspection and constructional analysis of cross-sectioning.