Wafer Overlay Measurement Using Bright-Field Optical Microscopy
Authors: Chia-Hung Cho, Po-Yi Chang and Yi-Sha Ku Company: Industrial Technology Research Institute (ITRI) Date Published: 11/11/2014
IWLPC (Wafer-Level Packaging)
Abstract: In the recent years, three-dimensional integrated circuits (3D ICs) has been generally acknowledged process in semiconductor technology with the advantages of low cost, low power consumption, high yield, high performance, and high density. All of the technologies in 3D integration are included through-silicon via (TSV), wafer thinning, and wafer bonding. In the manufacturing of integrated circuits, one of the most critical process control techniques is the wafer overlay accuracy between successive layers on a wafer because the overlay would cause the process failures such as translation, rotation, and expansion error. To meet the precision measurement of alignment accuracy for 3D integration in bonded wafers. We proposed the wafer overlay measurement system which is composed of high-resolution industrial camera, microscope objective and infrared light source. In order to obtain a high-resolution image of the upper and lower layers at the same time by using the bright-field and back lighting source. Last, using calibration and overlay algorithm automatically approach highly precision overlay shift and critical dimension results. In the specifications aspect, the field of view (FOV) of the system is 800 µm x 600 µm using the 10x objective lens, and the maximum measuring area is 12-inch wafer. The overlay shift accuracy of the system is 0.2 µm, while the repeatability and reproducibility of the system are 0.2 µm and 0.4 µm, respectively. Then the measured results using standard target are verified by the National Measurement Laboratory (NML) of the R.O.C which can enhance the reliability and traceability of the measurement system.