High Resolution 3D X-Ray Microscopy for the Development of Wafer Level Packaging and 3D IC IntegrationAuthors: Allen Gu, Ph.D., Raleigh Estrada, Bruce Johnson, Gabe Guevara
Company: Carl Zeiss X-ray Microscopy and Invensas Corporation
Date Published: 11/11/2014 Conference: IWLPC (Wafer-Level Packaging)
Structural characterization of the interconnecting elements, such as through silicon vias (TSVs), are of importance to circuit electrical functionality and reliability. Electrical behaviors, i.e. impedance and capacitance, depend on TSV pitch, diameter, and slope, etc. Infrared and visible light interferometry offers metrology solutions for surface TSVs and connected bumps. However, they do not provide enough subsurface detail to uncover subtle structural defects or misalignment of TSVs. Hence, as the process proceeds and devices are stacked vertically, these techniques become less useful because structures of interest are buried deep and most interconnecting materials are made of metals that are opaque to visible and infrared lights.
non-destructive, 3D X-ray microscopy, XRM, failure analysis, virtual cross-sectioning, intact wafers, microCT, 2D X-ray, high resolution, high contrast, TSV, voids, bumps, cracks, BGAs, tomography, geometric magnification, optical magnification, large working distance
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