High Throughput Wafer Edge Inspection and Monitoring for Advanced Wafer Level PackagingAuthors: Rohit Bhat, Heiko Eisenbach, Marc Filzen, Prashant Aji, Youxian, Wen, Sumant Sood, Thomas Uhrmann, Julian Bravin, Jürgen Burggraf
Company: KLA-Tencor and EV Group
Date Published: 11/11/2014 Conference: IWLPC (Wafer-Level Packaging)
In this paper, we present results from an edge inspection and metrology system for wafer level packaging applications that simultaneously captures 5mm of the wafer top side, wafer edge and 5mm of the wafer bottom side in one scan. The edge inspection system uses multiple detection channels for accurate and fast defect binning and provides 0.5 micrometers sensitivity. The paper focuses on critical inspection and metrology use cases from wafer level packaging and 2.5/3D integration for defect reduction and subsequent yield improvement.
Wafer edge, Edge inspection, edge metrology, 3DIC, WLP
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