IWLPC (Wafer-Level Packaging) Conference Proceedings

OEE and Production Yield Improvements on WLCSP Devices: Case Study Using A Novel Probe Design

Author: Ranauld Perez
Company: Johnstech International
Date Published: 11/11/2014   Conference: IWLPC (Wafer-Level Packaging)

Abstract: The pervasive demands for continuous user experience enhancements on existing mobility device applications as well as enabling the creation of new market segments are among the key market drivers for smaller and more power efficient devices. These drivers however are accompanied with hurdles to meet form factor (size), low power consumption and cost, all of which constantly challenge the devices’ value chain from design to final production test. The lion’s share of today’s mobility application devices are now moving towards Wafer Level Chip Scale Package (WLCSP) to meet the same drivers as mentioned [1]. Unlike typical encapsulated device package configurations, there are different sets of issues that accompany the production test environment particularly for mixed signal SOCs.

The purpose of this paper is to share and provide some insights regarding final wafer level testing of high volume audio SOC that has been released for commercial use. The focus will be on key test parameters that could be affected by wafer probe configuration and possible innovative improvements to meet production test yield and OEE expectations.

Key Words: 

WLCSP, mixed signal SOC, OEE, Wafer Probe

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