SMTA International Conference Proceedings


Assembly and Failure Analysis of WLP with 0.3 mm Pitch and Smaller

Authors: Dudi Amir and Chonglun Fan
Company: Intel Corporation
Date Published: 9/28/2014   Conference: SMTA International


Abstract: Increasing the functionality and decreasing the size of products used in mobile, wireless and other handheld devices requires the use of wafer level packages with 0.3 mm or smaller pitches. As the package pitch is reduced, it brings new challenges to the assembly process. Printing processes become more critical as the pads’ sizes are reduced and the package solder balls become smaller.

The focus of this paper is on the assembly process of 0.3 mm and 0.260 mm pitch wafer level packages. This paper will describe the test vehicle used and the process characterization, material selection and inspection for successful assembly of the packages on a board similar to a product. It will also provide a process envelope addressing paste printing and flux dipping. Finally, it will discuss common failure modes during SMT and failure analysis methods for the packages.

Key Words: 

0.3 mm Pitch, WLP



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