Surface Mount International Conference Proceedings


Author: M. Chan
Company: Advanced Manufacturing Tech.
Date Published: 8/23/1998   Conference: Surface Mount International

Abstract: Several component packaging options have rapidly emerged to address miniaturization and added functionality of electronic devices in recent years, and the task of introducing these component types to the design and manufacturing communities has become increasingly complex due to a shortage of industry standards, reliability data and readily accessible infrastructure. In an effort to diversify our electronic packaging options in the design of new systems and enhance our manufacturing capabilities, our organization has actively pursued the introduction of chip-scale packages (CSP) to our sector’ s diverse line of products. For the most part, our organization supports design and manufacturing programs that engineer low volume, high reliability systems where functionality, performance and custom form factors are our primary technological requirements. In this paper, the processes and activities used to introduce CSP technology into our organization are discussed. The document is organized according to activities identified by a technology development model created within our organization to standardize our technology development practices. A description of these activities will be followed by general insights and challenges encountered during the initial phases of process development and reliability assessment. The latter will not include specific process development data associated with our efforts, since the scope of this paper pertains to the evaluation and introduction of CSP-type devices into our existing manufacturing practices. As part of Harris’ s participation in the JPL MicrotypeBGA Consortium, an additional 30 assemblies were built by a member contract manufacturer to provide a benchmark to the Harris test vehicle.

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