Pan Pacific Symposium Conference Proceedings


3D Integration: Status and Requirements

Authors: M. Juergen Wolf and Klaus-Dieter Lang
Company: Fraunhofer IZM, ASSID
Date Published: 2/11/2014   Conference: Pan Pacific Symposium


Abstract: According to the increasing application driven demands on functionality, performance, miniaturization and reliability for microelectronic systems, System in Packages (SiP) using 3D integration are key elements for advanced microelectronic packaging. Key elements for 3D wafer level SiPs are the formation of Through Silicon Vias (TSVs) and their process integration into active devices as well as silicon interposer as a key enabler for 3D Systems.

Key Words: 

3D IC, SiP, TSV, interposer



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