IWLPC (Wafer-Level Packaging) Conference Proceedings

Examination Of Key Packaging Metrics Of A Hermetically Sealed MEMS Accelerometer

Authors: Joshua Krabbe MSc., Nick Wakefield Ph.D., Serguei Roupassov MSc., Andy vanPopta Ph.D. Peter Hrudey Ph.D., Siamak Akhlaghi Ph.D.
Company: Micralyne Inc.
Date Published: 11/5/2013   Conference: IWLPC (Wafer-Level Packaging)

Abstract: Micralyne Inc. has developed a high performance MEMS accelerometer that makes use of wafer level interconnection and packaging. This paper shares performance metrics for a selection of enabling technologies that allow these sensors to achieve ultrahigh sensitivity. Processing strategies and metrology techniques that have been developed through the course of the product development lifecycle are explored. Achieving low-noise in this product requires that the proof mass is encapsulated within an evacuated cavity. This encapsulation process must achieve a cavity pressure less than of 0.5 Pa over the duration of the lifetime of the device. This specification requires leak rates less than 1·10-17 Pa·m3·s-1 on every die during the hermetic sealing process. Such leak rates are not detectable using published testing protocols employing helium bombing. Micralyne has developed a protocol to accurately measure these leak rates and has developed a hermetic sealing protocol using Au-Si eutectic bonding that repeatedly meets this specification. The hermetic seal’s high performance must not be compromised by other features of the device, namely the electrical interconnections required to route electrical signals in and out of the device while maintaining low noise and distortion for industrial applications. Micralyne has developed a patent protected process that suitably routes these electrical signals from the device layer of a cavity silicon on insulator wafer to the substrate backside. This routing is achieved using an oxide-lined through-silicon-via (TSV) filled with conductive polysilicon. The resulting substrate is suitable for chip stacking as the signals are all routed to the reverse of the substrate. Micralyne is currently employing this sensor platform, which it calls µSilQ™ (pronounced Micra-silk), with the MEMS chip directly attached to a board or ASIC using a solder ball-grid-array (BGA) placed on the wafer backside prior to singulation.

Key Words: 

Wafer Level Packaging Hermeticity, Gold Silicon Eutectic Bonding, Through Silicon Via, Ball Grid Array.

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