IWLPC (Wafer-Level Packaging) Conference Proceedings


Automating The Design And Layout Of Wafer Level Masks

Author: Steve DiBartolomeo
Company: Artwork Conversion Software
Date Published: 11/5/2013   Conference: IWLPC (Wafer-Level Packaging)


Abstract: As more integrated circuits are packaged as flip chips, the number of designs passing through the redistribution process has greatly increased. The need to quickly and efficiently design a set of full wafer masks to fabricate the redistribution has also increased. In this paper we discuss a number of techniques and software tools we developed in cooperation with a major OSAT that have proven to greatly reduce the mask design time and to also have reduced errors that were introduced before these automation tools were put in place.

Key Words: 

mask, layout, automation, RDL, GDSII, flipchip, clipping, reticle, wafer.



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