Surface Mount International Conference Proceedings


Author: Julian P. Partridge
Company: XeTel Corporation
Date Published: 4/28/1997   Conference: Surface Mount International

Abstract: Many factors can impact chip-scale assembly process efficiency and several issues should be considered when integrating chip scale packages (CSP) into high volume assembly operations. Because of the higher array density associated with CSPS, assembly specialists have found that design layout, circuit board quality and machine operations directly affect manufacturing process yield. In this paper the authors describe each element within the assembly sequence for a two-sided PC flash memory card and present data illustrating the differences between the traditional TSOP and CSP packages. The product includes chip-size uBGAQ devices placed using a high speed chip-shooter and recommendations are made regarding SMT process optimization.

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