IMPACT OF FINE PITCH LEAD COPLANARITY ON SURFACE MOUNT YIELD
Author: David M. Mendez Company: Solectron Corporation Date Published: 4/28/1997
Surface Mount International
Abstract: One of the highest re-occurring manufacturing defects in the production of printed circuit assemblies (PCAS), is poor solder joints due to missing ad/or insufficient solder. There are several variables in the manufacturing process that can contribute to this particular failure mechanism such as solder paste height, solder paste volume, or the printed circuit board topography. Most of these are fairly well understood and under some form of SPC control in the manufacturing facility. Another variable that is well known but much less understood is the overall lead integrity of surface mount components, in particular, the maximum lead coplanarity of any individual component. It is believed by the authors that a large maximum coplanarity can override the contribution of all the other variables resulting in a poor solder joint on one or more leads. In the best case, this failure would be readily visible at surface mount board inspection and could be reworked at this point with relative ease. Another scenario is that the failure may not be detected until board test at which time rework would be possible, however, usually more difficult. The worst case scenario would be the case in which there is a poor solder joint but there is some electrical continuity between the device lead and the PWB pad. This board could pass an in-circuit electrical test (ICT) and be delivered to the customer with a potential latent reliability defect that could result in a field failure.