Pan Pacific Symposium Conference Proceedings


Low-Cost Silicon And Glass Interposers And Packages

Authors: Professor Rao R. Tummala; Venky Sundaram, Ph.D.; Tapobrata Bandyopadhyay; Vivek Sridaran; and Vijay Sukumaran
Company: Packaging Research Center, Georgia Institute of Technology
Date Published: 1/18/2011   Conference: Pan Pacific Symposium


Abstract: Miniaturization of electronic systems is expected to continue in two parallel paths: smaller transistors to 16nm node and beyond, and smaller interconnections by 3D IC stacking. Both these approaches require an entirely new interposer or package approach to interconnect these 2D and 3D ICs at system level. Georgia Tech PRC is pioneering low-cost, non-traditional silicon and glass interposer approaches to achieve ultra-high I/Os at ultra low cost.

This paper describes the glass and silicon interposers from electrical design and modeling, to tools, materials and processes to fabricate interposer and integrate such interposers with selective embedded thin film passive components.

Key words: Silicon, glass, interposers, miniaturization, 3D integration, embedded components, design, modeling, through-package-vias.



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