PCB PAD SITE DRESS METHODS ON BGA AND SOCKET PAD ARRAYSAuthors: James Wade and Raiyo Aspandiar; Don Naugler and Terry Leahy
Company: Intel Corporation; V. J. Technologies
Date Published: 10/24/2010 Conference: SMTA International
Phase 1 benchmarked the most current solder stations used in the industry for BGA PCB pad site redress. Phase 2 was done to understand if heating the PCB BGA component location during PCB pad site dress will reduce the thermal/mechanical stress to the PCB lands during the site dress process. Phase 3 compare braided copper wire with solder iron type, vacuum scavenging, and flat rigid copper coupons. Electrical test, x-ray, and Die & Pull (DnP) data was used to quantify the capability of the different site redress methods. All the same Critical To Function (CTF) parameters were used in these experiments and will be described in this paper as well.
The rework reflow CTF parameters used for removal and placement of the BGA and socket can have an impact on weakening the PCB pads during the rework process. The PCB pad site dress method can induce the most significant damage when not done properly due to the inexperience of the operator performing the task and how well they are trained on the method they use.
The results from the three different studies for PCB Pad Site Dress Methods on BGA and Socket Pad Arrays will provide insight on which techniques performed best for either of the two component sites from a time 0 first pass yield assessment (FPA). The FPA will be based on e-test for opens and x-ray for solder joint bridging. Failure analysis (FA) via cross sections will highlight any findings such as component solder joint mis-alignment and PCB pad crater. Die and pull was used to identify the same defects as well.
Key words: BGA repair, PCB pad site dress, Solder scavenging, board damage, pad cratering
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