How to Implement Good Test Coverage and Eliminate Escapes for Printed Circuits Board Assembly OperationAuthors: Gaosen Li, An Qi Zhao, Andrew Ho, Wei Wen, Zhen (Jane) Feng, Ph. D., and Murad Kurwa; Haolee Yang and Liang Chen
Company: FLEXTRONICS International Inc.; Test Research Inc.
Date Published: 10/24/2010 Conference: SMTA International
In this paper we will share our study results of the following techniques: AOI, AXI, and ICT per current production line. We collected testing data for medium and low complexity assemblies from our production line directly. The tester detection percentage is different for assemblies with different complexity index. For the study, we tested boards at both Agilent 5DX and TR7600 machines.
We will discuss the optimized method based on analysis data by using the software tool “Flextronics’ Coverage Improvement System” (CIS) by which we are able to have 100% testing coverage and reduce duplicated test components for different complexity assemblies.
In addition, we did experiments studying the correlation between the various techniques with our three special boards which have defective pins at different component packages including QFN with 0.4 - 0.5 mm pitch size and BGAs with 0.8 - 1 mm pitch size. We had correlations between SPI-5DX, SPI-TR7600, 5DX-TR7600 and SPI-AOI based on the data. These studies helped us to have better understanding of SPI, AOI, and AXI technique performance with more than 38,000 experimental data points, and helped us to make efficient test methods for SMT lines.
Key words: SPI, AOI, AXI, ICT, Yield, Test Coverage, Escaped, Correlations.
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