IWLPC (Wafer-Level Packaging) Conference Proceedings


MICROSPRINGS FOR INTEGRATED TEST AND PACKAGING

Authors: Eugene M. Chow, Ph.D.
Company: Palo Alto Research Center (PARC)
Date Published: 10/11/2010   Conference: IWLPC (Wafer-Level Packaging)


Abstract: Lithographically defined spring electrical contacts have many applications for next generation electronics test and packaging. The springs can lower the cost of multi-chip modules because their rework ability addresses the knowngood- die problem. Lower height chip stacking for mobile electronics markets is enabled because a sliding spring can have a much shorter profile than solder. Larger die can be directly bonded to the board because the compliance absorbs thermal expansion mismatches between substrates. Significant stress isolation is possible, which is important for mechanically sensitive die such as MEMS and low K die. Very high density is possible, as 6 µm pitch has been demonstrated. Fabrication is scalable and assembly is low temperature. This paper reviews our prototype demonstrations for these applications as well as relevant reliability data and contact studies.

Key words: spring, interconnect, wafer-level packaging (WLP), multichip module (MCM), high density



Members download articles for free:

Not a member yet?

What else do you get when you join SMTA? Read about all of the benefits that go along with membership.

Notice: Sharing of articles is restricted to just your immediate work group. Downloaded papers should not be stored on an external network or shared on the internet.


Back


SMTA Headquarters
6600 City West Parkway, Suite 300
Eden Prairie, MN 55344 USA

Phone +1 952.920.7682
Fax +1 952.926.1819