Pb-FREE REFLOW PROCESS STUDY FOR HIGH YIELD, HIGH RELIABILITY FLIP CHIP ON SILICON SUBSTRATE ASSEMBLYAuthors: Zhaozhi Li, Sangil Lee, Brian J. Lewis, Paul N. Houston, Daniel F. Baldwin, Gene Stout, Ted Tessier and John L. Evans
Company: ENGENT, Inc.; FLIPCHIP INTERNATIONAL LLC; Auburn University; Georgia Institute of Technology
Date Published: 10/24/2010 Conference: SMTA International
This paper explores the impact of reflow profile parameters toward the yield, solder joint quality and reliability for a 3D silicon-on-silicon flip chip package. Three reflow profile parameters (factors) including soak time, peak temperature and time above liquidus were investigated by the Design of Experiment (DOE). The Response Surface Methodology (RSM) is utilized in the DOE to explore the non-linear effect (quadratic effect) of each factor as well as the interactions among factors.
Study results show that the fine pitch flip chip on silicon package has a wide reflow process window to achieve 100% yield, if reflowed in a Nitrogen environment. Yield loss was found when the packages are reflowed in air, with the “flux burn time” playing a key role. For the fifteen reflow profiles investigated, it was found that the studied reflow parameters are not significant in terms of the package shear strength. However, positive correlation was found between the package shear strength and the reflow profile ramp-down rate. It was found that the time above liquidus is a significant factor controlling the solder joint intermetallic thickness, with a 99.9% confidence level. No statistical difference was found among packages assembled under 15 different reflow conditions by 2,500 liquid-to-liquid thermal shock reliability testing.
Key words: Pb-free reflow, silicon on silicon, 3D flip chip packaging, intermetallic compound thickness
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