THE INFLUENCE OF SOLDER VOID LOCATION ON BGA THERMAL FATIGUE LIFE
Authors: Richard Coyle, Peter Read, and Richard Popowich; Heather McCormick; John Osenbach Company: Alcatel-Lucent; Celestica, Inc.; LSI Corp. Date Published: 10/24/2010
Abstract: This paper addresses the effect of solder process voiding on the board level, thermal fatigue reliability of a large body 680 I/O plastic ball grid array (PBGA). The study is a subset of a much larger ongoing investigation of Pb-free reliability using the PBGA package as the primary test vehicle. Different assembly process parameters were used to generate localized voiding at either the package or the printed circuit board side of the solder joints. The fatigue performance was measured using accelerated temperature cycling with a 0°C to 100°C thermal cycle. Baseline microstructural analysis and post-cycling failure analysis was conducted on representative test samples from each cell. Voiding was characterized using optical metallographic techniques. The fundamental conclusion of the investigation is that process voiding can reduce the interconnect fatigue reliability but that void location, not void size or volume fraction, has the greatest influence on fatigue life.
Key words: solder process voiding, accelerated temperature cycling, Pb free solder.