ADVANTAGES OF A NEW WAFER LEVEL INTEGRATION CONCEPT BASED ON DIRECT BONDED SILICON ON LTCCAuthors: J. Müller, et al.
Company: Ilmenau University of Technology and Hermsdorfer Institut für Technische Keramik e.V.
Date Published: 1/26/2010 Conference: Pan Pacific Symposium
This "Silicon-On-Ceramic"-substrate enables a wide range of design solutions, whereby several, unfired ceramic layers are prepared with vias, wirings and fluidic channels using standard LTCC-technologies. After sintering, the ceramic acts as a carrier system with electrical and fluidic properties. The Si-side of the compound substrate can be further used to generate MEMS or NEMS-devices or for high density electrical interconnects made by thin film processes. To ensure the electrical functionality of MEMS devices, only a thin silicon layer is necessary. The separation of silicon areas can be easily accomplished by standard silicon etching processes such as DRIE or RIE, in which the ceramic works as a natural etching barrier. Consequently, the process enables wafer level system packaging.
In addition to wiring and mounting pads, the LTCC part of the compound may contain fluidic features (e.g. for active cooling) or passive integrated components. The electrical connection between the Si-wafer and the LTCC can be achieved during sintering or in a post-process. The paper addresses manufacturing and material issues as well as ongoing development strategies to improve the interconnect density of the compound substrate.
Key words: LTCC, Black Silicon, Wafer Bonding, Packaging
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