FRACTURE TOUGHNESS OF VARIOUS PRINTED CIRCUIT BOARD SURFACE FINISHES SOLDERED WITH LEAD FREE SOLDER
Author: Dick Casali Company: Intel Corporation and Oregon State University Date Published: 10/4/2009
Abstract: Current printed circuit board assemblies are empirically tested for reliability certification. A more rigorous approach is use fracture mechanics. To apply fracture mechanics and crack growth models to reliability testing of microelectronics, such as ball grid array solder joints on microelectronic circuit boards, fundamental properties need to be known. Fracture toughness and the stress intensity factor for the specific metallurgical system and geometry need to be known. The objective of the proposed research is to use ASTM E399 to determine Fracture Toughness for a lead free alloy-surface finish combination, to see how strong an influence surface finish has on fracture toughness and lastly, to provide some understanding on the dislocations role in macro features of fractured solder. The proposed research intends to provide supporting data for pursuing the use of the linear elastic fracture mechanics approach to ball grid array (BGA) solder joint reliability evaluation for shock testing. That is, the necessary ground work to enable current confidence levels for reliability to be maintained while using less product and capacity in the reliability testing pipeline. The proposed research will also provide data on how much surface finish influences fracture toughness and therefore reliability. Follow on projects are suggested that build upon this research and furthers the goal of making BGA solder joint reliability evaluation more efficient.