NEW SOLDER BUMPING TECHNOLOGY AND ADAPTED ASSEMBLY PROCESSES FOR 100 µm PITCH FLIP-CHIP-TECHNOLOGY USING CAPILLARY FLOW OR NO FLOW UNDERFILL
Authors: Florian Schüßler, et al. Company: University Erlangen-Nuremberg, Micro Systems Engineering GmbH, PAC TECH - Packaging Technologies GmbH, and KSG Leiterplatten GmbH Date Published: 10/4/2009
Abstract: In this paper we will present new cost-efficient solder bumping and adapted assembly technologies for the processing of flip-chips with a pitch of 100 µm or less and solder ball diameters of 60 µm or 50 µm, respectively. The wafer bumping has been realized using a highly efficient Wafer Level Solder Sphere Transfer (WLSST) process. This technology uses a patterned vacuum plate in order to simultaneously pick up all of the preformed solder spheres, optically inspect for yield, and then transfer them to the wafer at once. This paper will discuss this technology and the process parameters for producing fine pitch solder bumps. The flip-chips were assembled on special BT- and FR4-material using reflow soldering. Due to the large thermal expansion mismatch between substrate and chip, special epoxy based underfill has to be used in order to increase the long term reliability of the lead-free solder joints. The use of capillary flow as well as of no flow underfill and applicable design rules for these highly miniaturized structures will be discussed. For cost efficiency reasons all processes investigated base upon standard processes of the surface mount technology, but are adapted to the requirements of highly miniaturized components. Results of the reliability tests will be discussed additionally. An analysis of the failure mechanism will be given and recommendations for further miniaturizations will be presented.