COPPER ELECTROPLATING PROCESS FOR NEXT GENERATION CORE THROUGH-VIA FILLINGAuthors: Stephen Kenny and Bernd Roelfs
Company: Atotech Deutschland GmbH
Date Published: 2/12/2009 Conference: Pan Pacific Symposium
The disadvantages of the existing plugging process can be eliminated by using pure copper to produce the planar surface. For the next-generation process, copper is deposited into the through vias as an integral part of the metallization process. The drilled dielectric is made conductive and a thin layer of copper metal is deposited to give a seed layer for the copper deposition process. The through-vias are then completely filled by a modified electrolytic copper deposition process, which can be accomplished in a single, fully automatic continuous processing line.
The use of pure copper has obvious advantages in that its thermal characteristics are significantly better than any type of resin material available. This fact can give more design options to utilize the improved thermal transfer capability of vias in a substrate than are currently available. The CTE of the copper-filled core is dependant only on the copper metal and the glass-supported resin of the drilled dielectric. The copper structures in the subsequent layers may be positioned directly above the copper-filled through-vias with no reliability implications. In fact, the conductive path within the substrate may be designed to utilize the more direct and parallel connection from one side of the substrate to the other.
Use of pure copper for the filling of through vias in substrates has technical advantages inherent in the use of the copper material and also the potential of improved yields due to the simplified processing required. The improvement in processing yields can have a significant impact on the overall cost of the production for the next generation of substrates.
Key words: Cu Electroplating, Core, CTE, Thermal vias, Flip chip, BGA.
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