IWLPC (Wafer-Level Packaging) Conference Proceedings


Authors: Steve T. Cho, Ph.D. and Steve Anderson
Company: Surfect Technologies
Date Published: 10/13/2008   Conference: IWLPC (Wafer-Level Packaging)

Abstract: Both the integrated circuit and solar industries face the same challenge: the need to improve performance in the face of a mandate to reduce cost. Both businesses are finding that the cost:performance ratio of achieving improvement through the semiconductor (or front) end continuing to climb. The semi industry has recognized the benefits of chip scale packaging, but struggles with controlling expense. The solar industry is learning from semi and is starting to implement lower cost materials and processes (such as multi-metal stacks) while improving performance and reliability in the back end. However, the solar industry can delve deeper into the semi playbook and find that the flexibility in form factor that chip scale packaging presents as well as the integration of multiple functions (e.g., power management) can accelerate the solar drive towards power grid parity. This paper reviews how the solar industry is integrating semiconductor packaging technology into its cells and modules and how controlling the costs of processes, materials, and tools will be a key enabler for the growth of solar.

Keywords: CSP, solar, plating, module, interconnect

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