Pan Pacific Symposium Conference Proceedings


Author: Phil Marcoux
Company: TPL Group
Date Published: 1/24/2008   Conference: Pan Pacific Symposium

Abstract: Through silicon vias, or TSVs have received much press in the past couple of years as the next significant interconnect from the IC to the outside world.

The initial presentations have provided enthusiastic views of what TSVs can provide. However, as developers have spent the needed time to develop and refine their processes the reality and difficulties of TSVs have appeared. Fortunately, improvements and alternatives to TSVs have emerged from these efforts.

This paper will report on these experiences from the point of view of a company that is a user, developer, and believer in the future of these wafer based interconnection processes.

Key words: wafer level packaging, WLP, Through silicon vias, TSV, IC packaging.

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