SMTA International Conference Proceedings


FRAME LEVEL PACKAGING: FLIP CHIP APPLICATION

Authors: Charles Lin, Nick Wang, Len Chen, Ken Chang, Andy Lim, and Jerry Tan
Company: Bridge Semiconductor Corporation
Date Published: 10/11/2007   Conference: SMTA International


Abstract: “Frame Level Packaging” an integrated approach to IC packaging is presented. This packaging technology aims to achieve enhanced package performance by combining the technical advantages of build up substrate, lead-frame and wafer level packages. Whilst wafer level packaging uses wafer as the processing panel, frame level packaging uses copper frame as the processing panel to build the IC packages with the existing backend infrastructure. Design flexibility and enhanced performances are achievable using the redistribution layer and array terminals residing on the fortified copper frame.

This paper describes how frame level packaging can bring about a flip chip package using a combination of gold stud bumping and gold-gold interconnect (GGI). Substrate structure and flip chip bonding results of the assembled packages are also presented.

Key words: Flip Chip, WLCSP and Lead-frame based package



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