IWLPC (Wafer-Level Packaging) Conference Proceedings


Authors: PV Rainey and R Dickie et al.
Company: Queen's University of Belfast
Date Published: 9/17/2007   Conference: IWLPC (Wafer-Level Packaging)

Abstract: This paper describes a new die attachment method for embedded chip packaging, based on electroplating. A silicon substrate is dry etched from the front to form die-sized recesses, and from the back to form through-holes. A metal seed layer is deposited and after die placement, electroplating is employed to fill the gaps between the die base contact and the substrate forming a permanent bond. After removal of unwanted seed metal, benzo-cyclo-butene (BCB) is used for passivation and planarisation and is patterned to form contact windows. Finally planar metal interconnects are formed to the die contact pads. Since there is no organic adhesive to consider, post die-embedding processes can be conducted at higher temperatures than previously possible. Improved thermal performance during device operation is facilitated by the thermal vias in the form of the copper plated plugs that ensure efficient heat removal.

Key words: Embedded chip, System integration, RF packaging, Electroplating

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