IWLPC (Wafer-Level Packaging) Conference Proceedings


LOW EXPANSION SUBSTRATES FOR WAFER-LEVEL PACKAGING OF OPTO- AND MEMS DEVICES

Authors: Greg Rudd and Bud Kundich
Company: Spectra-Mat, Inc.
Date Published: 9/17/2007   Conference: IWLPC (Wafer-Level Packaging)


Abstract: Joining die to package components at the wafer stage of device manufacture can result in significant cost savings. A substrate with good thermal conductivity is required where devices dissipate significant power. Additionally, using a substrate with a coefficient of thermal expansion (CTE) similar to the device can increase reliability when temperature-induced strain from assembly is a problem.

Tungsten-copper and Molybdenum-copper metal-matrix composites (W/Cu and Mo/Cu) have long been used for package components and heat sinks. They have good thermal conductivity (similar to that of aluminum), but unlike aluminum or most alloys, can be made with any of a range of CTE to match various other device and substrate materials. W/Cu can have the same CTE as GaAs over a wide temperature range, and as such has found application with certain power electronics, high power diode lasers, and high brightness LED’s. It makes a useful interface material because it has some ductility to relieve strain and is readily machined, plated, and brazed.

In our paper, we present data on W/Cu and Mo/Cu substrates up to 150mm diameter produced to specifications suitable for wafer level packaging. We describe the properties of the material and show the result of the measurement of form, Total Thickness Variation (TTV), and surface finish. We show how the substrates can be patterned with functional features. We also illustrate possible applications such as ceramic/metal composite wafers, MEMS lids, and diode heatspreader/package bases.

Key words: Wafer-level packaging, cavity wafer, substrate, thermal expansion.



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