IWLPC (Wafer-Level Packaging) Conference Proceedings


µPILR™ PACKAGE-ON-PACKAGE QUALIFICATION TESTING A Practical 3D Solution for Memory and Mixed Memory Applications

Author: Vern Solberg
Company: Tessera, Inc.
Date Published: 9/17/2007   Conference: IWLPC (Wafer-Level Packaging)


Abstract: To address the need for more functionality without increasing their products size, a number of companies have adapted various forms of multiple-die 3D packaging. A majority of these early multiple function devices relied on the sequential stacking of die elements onto a single substrate interposer. The die-to-substrate interface was generally made using a conventional wire-bond process, but, because the wire-bonding of multiple tiers of uncased die is rather specialized and the die used may have had relatively poor wafer level yields (or were not always available in a pre-tested condition), overall manufacturing yield of the stacked-die packaged devices have not always met acceptable levels.

The motivation for developing higher density IC packaging continues to be the portable phone market and the consumers’ expectation that each new generation of products furnish greater functionality. These miniature IC package innovations have proved ideal for a growing number of portable and hand-held electronic applications. The challenge electronic manufactures face when competing in the world marketplace is to offer a product that will meet all performance and functionality expectations without increasing product size or cost.

The information presented in this paper will focus on the companies µPILR™ package platform, a very thin vertically configured package technology and the extensive qualification test program developed for a high volume stacked NAND Flash product. A key advantage of this package-on-package configuration is that each layer of the package can be pre-tested before joining. This capability greatly improves the overall manufacturing yield and the functional reliability of the final package assembly is assured. Although the material developed for this paper focuses on the development of a very thin 8-die FLASH memory product, the µPILR technology will likely be adopted for multiple function packaging for hand-held and portable electronic applications and a any number of mixed memory and mixed function variations.

Key words: µPILR, CSP, PoP, FLASH Memory



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