IWLPC (Wafer-Level Packaging) Conference Proceedings


HERMETIC, WAFER LEVEL, CAVITY PACKAGE COMPATIBLE WITH COB ASSEMBLY

Author: G. Humpston et al.
Company: Tessera Inc.
Date Published: 9/17/2007   Conference: IWLPC (Wafer-Level Packaging)


Abstract: Many types of micro electro-mechanical system (MEMS) require a cavity package for their function. Often the cavity needs to be filled with a gas of controlled composition and pressure and the atmosphere has to be sustained for the lifetime of the device. Accordingly, the package must be totally hermetic. At the same time, the market demand for ever thinner and cheaper portable electronics products requires the packaging process is conducted at the wafer level. Some MEMS devices are not compatible with lead-free solder reflow processes and a ball grid array interface increases the thickness of the part. For such devices, the preferred attach and interconnection processes are chip-on-board assembly.

Presented is a totally hermetic, cavity package, fabricated at the wafer level, suitable for MEMS and other devices. To simplify the package construction different materials and processes are used to affect the mechanical assembly and the hermetic seal. The package lid can be opaque or optically transparent. The cavity height is achieved by a picture frame spacer, so can range from microns to millimetres. The packaging process leaves the bond pads on the die exposed for probing and chip-on-board assembly. Initial reliability tests indicate it will meet market requirements and cost models predict it will be competitive with discrete packaging solutions.

KEYWORDS Wafer level package, hermetic, COB assembly



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