IWLPC (Wafer-Level Packaging) Conference Proceedings


3D PACKAGING AND INTERCONNECTING OF BARE DIE CHIPS BY DIRECT-PRINT TECHNOLOGY

Authors: Vladimir Pelekhaty and Bo Li et al.
Date Published: 9/17/2007   Conference: IWLPC (Wafer-Level Packaging)


Abstract: Micro-dispensing of various adhesive and conductive pastes has been used for electronic packaging and interconnections for more than 20 years. Modern advances in computerized motion control, video image analysis and precision dispensing open the possibility for building compact, lightweight and efficient hybrid circuits from bare die chips by direct-print of micro-dispensed interconnections. nScrypt has developed the computer controlled articulate manipulation of their proprietary nano-dispensing tools with sub-micron precision. Along with stereoscopic micro-vision based calibration and referencing, which is also capable of locating the position and orientation of components in a three-dimensional space, the developed nano-dispensing system allows us to write conductive, resistive, dielectric and adhesive patterns directly on the surface of the active and passive components as well as on the supporting substrates, including conformal surfaces. The developed direct-print technology for 3D packaging and interconnection of bare die chips allows us to stack-up both similar, for example memory and/or processing chips, and dissimilar chips, like laser diode or LED dies on top of their current drivers or photo-diode chips on top of the preamplifier chips.

Keywords: Direct printing, high density interconnects, bare die chip.



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