Rework of Package on Package in Lead-Free ArrayAuthor: Paul Wood
Company: OK International
Date Published: 4/22/2007 Conference: SMTA China
It is generally accepted that lead-free soldered connections require higher processing temperatures than traditional tin-lead connections. These higher lead-free soldering temperatures, coupled with ever desirable requirements for faster production rates, increase the risk of board and component damage. The use of POP increases assembly complexity. To offset this, new techniques for improved process control are necessary.
Component manufacturers are all looking for new innovative ways to gain market share, particularly in memory products. Reducing PCB space is always attractive to their markets. There are two ways to reduce space. One is to reduce the pitch (lead to lead spacing) the other is to utilize vertical space (stack components). Reducing pitch increases connections have been reduced. The pitch of most BGAs range from 1.27mm and 1.00mm while CSPs have pitches of 0.8mm to 0.5 mm. Undoubtedly, we can expect these pitches to decrease with time thus increasing assembly challenges.
As previously mentioned an alternative way to reduce PCB space is to stack components vertically. This is called package-on-package (POP). This arrangement has one BGA mounted on another. In some cases, such as memory modules, component manufacturers mount as many as four components vertically! The POP packages use BGA packages with 1.0mm and 1.27mm pitch and CSP packages with 0.5 mm and 0.4mm pitch. A second variation on POP stacking is where component manufacturers mix DDR RAM and logic in one device or where SRAM and DRAM are mixed in one POP. Key Words: POP, package-on-package.
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